There are two kinds of integer transform in H264，8×8 integer transform and 4×4 integer transform This makes hardware design more complex At the same time

more powerful decoder is required for high definition video application High performance hardware architecture is proposed for 2D inverse integer transform in H264 For 4×4 inverse integer transform

four 4×4 blocks in an 8×8 sub-macroblock was reconstructed Therefore

the 8×8 2D inverse integer transform and 4×4 2D inverse integer transform could have the same architecture With a new strategy of data storage and pipeline

inverse transform for column data and inverse transform for row data could perform at the same time On average

32 clocks were needed for processing an 8×8 sub-macroblock The transpose memory was composed of a two-port 32×32bits SRAM and 8 groups of registers Compared with former design

the new architecture could reduce 537% area of transpose memory When clocked at 108 MHz

the proposed design can perform real-time inverse transform for high definition video decoder of H264