H.264/AVC中1/4精度内插算法的硬件设计与实现

赵子梁; 郑世宝

doi:10.11834/jig.20071011

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专辑

H.264/AVC中1/4精度内插算法的硬件设计与实现
Design and Implementation of Quarter-pixel Interpolation in H. 264/AVC
2007年12卷第10期页码：1740
纸质出版：2007
DOI： 10.11834/jig.20071011
稿件说明：

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赵子梁, 郑世宝. H.264/AVC中1/4精度内插算法的硬件设计与实现[J]. 中国图象图形学报, 2007,12(10):1740. DOI： 10.11834/jig.20071011.

Design and Implementation of Quarter-pixel Interpolation in H. 264/AVC[J]. Journal of Image and Graphics, 2007, 12(10): 1740. DOI： 10.11834/jig.20071011.

摘要

为了快速地进行H.264/AVC中1/4精度像素内插，提出并实现了一种适用于H．264中1/4像素精度的内插算法的硬件设计。其中对亮度分量，设计了一种将2维滤波转换为1维滤波，4个滤波器并行处理，同时采用流水线技术和用移位加代替乘法运算的硬件架构；对色度分量，用移位加代替乘法运算进行1/8像素精度的内插。实践表明，此架构可满足标清及高清要求，且速度快，面积小。

Abstract

In this paper

a hardware architecture forquarter-pixel interpolation in H.264 is proposed. As for the luminance component

we adopta design which is using four parellel filters which can turn 2-D filter into 1-D filter and using pipeline technique and shift add instead of multiplication in the mean time. While for the chrominance component

we use a design comprising of only shift add to calculate the eight-pixel interpolation. The architecture proposed in this paper can meet the requirement of SD and HD and it works fast and consumes less resources.